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| LEADER |
01360cam a22003014a 4500 |
| 005 |
20130718111341.0 |
| 008 |
101201s2010 paua b 001 0 eng |
| 010 |
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|a 2010045850
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| 020 |
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|a 9781609602123 (hardcover)
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| 020 |
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|a 9781609602147 (ebook)
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| 040 |
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|a DLC
|c DLC
|b hrv
|d HR-ZaFER
|e ppiak
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| 042 |
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|a pcc
|
| 050 |
0 |
0 |
|a TK7895.E42
|b D467 2010
|
| 082 |
0 |
0 |
|a 621.3815
|2 22
|
| 245 |
0 |
0 |
|a Design and test technology for dependable systems-on-chip /
|c Raimund Ubar, Jaan Raik, and Heinrich Theodor Vierhaus, urednici.
|
| 260 |
|
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|a Hershey, PA :
|b Information Science Reference,
|c 2011.
|
| 300 |
|
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|a xxv, 550 str. :
|b ilustr. ;
|c 29 cm.
|
| 504 |
|
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|a Includes bibliographical references (p. 494-533) and index.
|
| 520 |
|
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|a "This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--
|
| 650 |
|
0 |
|a Systems on a chip
|x Design and construction.
|
| 650 |
|
0 |
|a Networks on a chip
|x Design and construction.
|
| 650 |
|
0 |
|a Systems on a chip
|x Testing.
|
| 650 |
|
0 |
|a Networks on a chip
|x Testing.
|
| 700 |
1 |
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|a Ubar, Raimund,
|d 1941-
|
| 700 |
1 |
|
|a Raik, Jaan,
|d 1972-
|
| 700 |
1 |
|
|a Vierhaus, Heinrich Theodor,
|d 1951-
|
| 942 |
|
|
|2 udc
|c K
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| 999 |
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|c 41310
|d 41310
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