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01318cam a22003014a 4500 |
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20130713153402.0 |
| 008 |
990104s1999 mau b 001 0 eng |
| 010 |
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|a 99012430
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| 020 |
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|a 0792384520 (alk. paper)
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| 040 |
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|a DLC
|c DLC
|d HR-ZaFER
|b hrv
|e ppiak
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| 042 |
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|a pcc
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| 050 |
0 |
0 |
|a TK7871.99.M44
|b U92 1999
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| 082 |
0 |
0 |
|a 621.39/732
|2 21
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| 100 |
1 |
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|a Uyemura, John P.
|q (John Paul),
|d 1952-
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| 245 |
1 |
0 |
|a CMOS logic circuit design /
|c John P. Uyemura.
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| 260 |
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|a Boston :
|b Kluwer Academic Publishers,
|c c1999.
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| 300 |
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|a xviii, 528 p. ;
|c 27 cm.
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| 504 |
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|a Includes bibliographical references and index.
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| 650 |
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0 |
|a Metal oxide semiconductors, Complementary
|x Design and construction.
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| 650 |
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0 |
|a Logic design.
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| 650 |
|
0 |
|a Digital integrated circuits
|x Design and construction.
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| 650 |
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0 |
|a Integrated circuits
|x Very large scale integration
|x Design and construction.
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| 856 |
4 |
2 |
|3 Publisher description
|u http://www.loc.gov/catdir/enhancements/fy0821/99012430-d.html
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| 856 |
4 |
1 |
|3 Table of contents only
|u http://www.loc.gov/catdir/enhancements/fy0821/99012430-t.html
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| 906 |
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|a 7
|b cbu
|c orignew
|d 1
|e ocip
|f 19
|g y-gencatlg
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|2 udc
|c K
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| 955 |
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|a pb07 to ja00 01-05-99; jf05 to subj. 01/06/99; jf08 01-06-99 to SL;jf12 01-06-99 to ddc; CIP ver. jf05 to sl 04/16/99
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| 999 |
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|c 34482
|d 34482
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