Network on chip many-core architectures for multimedia processing : : doctoral thesis - Hofman, Daniel (D. Hofman ; Fakultet elektrotehnike i računarstva, 2015)
ABSTRACT: This thesis presents research in the field of multimedia processing on many-core architectures. Novel architectures which enable the information about the priority on-chip traffic, generated by the multimedia applications, to be transported over the NoC with a higher priority are proposed. Together with the architectures, router scheduling algorithms are proposed. This type of Quality of Service (QoS) algorithms are a best effort algorithms which means that they will try to give maximal advantage to the desired set of multimedia processing applications running on a many-core processor. They enable the network to prioritize desired traffic and to schedule and route it through NoC with proposed Smart Stream Priority Routing (SSMPR) routers. SSMPR routers are a single-hop multiple asynchronous repeated traversal routers that can dynamically create virtual paths and traverse flits in just one network cycle over several links and routers. Optimizations of multimedia processing applications for the proposed architectures is proposed and implemented with a goal of efficient processing of data. Two multimedia processing applications are described: image compression based on predictive coding and H.264 video coder. Prioritization of traffic is performed for the data and computationally intensive parts of the predictive coding application, using a streaming model of computation. H.264 application has been optimized on the frame level granularity with prioritizing the threads encoding the frames. Experiments and simulation results show speedups and prove that SSMPR architecture proposed in the thesis has a potential to improve priority application execution on many-core architectures. Proposed architectures and algorithms are scalable and show reduction in energy consumption. -